1. Field of the Invention
The present invention generally relates field effect transistors (FETs). In particular, the invention relates to metal oxide semiconductor FETs (MOSFETs) having a strained channel induced by an embedded stressor with a sigma shape.
2. Description of Related Art
Applying stress to the channel of a field effect transistor is desirable to increase the speed of the device. One way to apply stress is by embedding an alloy in a substrate where the alloy has a lattice constant different than that of the substrate. For example, in a silicon germanium alloy (herein “SiGe”), SiGe alloys have a larger lattice constant than a silicon substrate. Accordingly, an embedded SiGe region pushes the neighboring silicon substrate and imparts compressive stress to the device channel. To impart a tensile stress to the substrate, a silicon carbide (herein “SiC”) alloy is used. SiC alloys have a smaller lattice constant compared to silicon. Accordingly, an embedded SiC region pulls the neighboring silicon substrate thus creating tensile stress in the device channel.
Referring to FIG. 1, alloys embedded in a substrate 127 of an FET device 100 usually have a rectangular shape and vertical sidewall on the channel side of the embedded alloy 122. The channel-sidewall 121 of the embedded alloy 122 is laterally offset 165 a distance from the channel 155 located under a gate dielectric 150. In FIG. 1, the lateral offset 165 happens to be equal to the width of a first spacer 130. In order to create more stress closer to the channel 155, “sigma-shaped” embedded alloy 122 structures have been proposed. Sigma-shaped structures have a vertex 160 which has a smaller lateral offset 165 from the channel 155 compared to embedded structures with a rectangular recess (Compare FIGS. 1 and 2).
The process of making the vertex 160 of a sigma-shaped embedded alloy 122 structure typically involves etching a rectangular recess in the substrate and then wet etching to form facets 128 on the sidewall (See FIG. 2). However, to create more stress a greater volume of alloy is desired, therefore a deeper recess is desired, but a deeper recess moves the vertex further away from the channel and diminishes the stress created by the vertex. Accordingly, a process which can optimize (maximize) volume of alloy and control the location of vertex (closer to the channel both laterally and vertically) is desired.
Another problem with current sigma-shaped embedded alloys will be described in conjunction with FIGS. 3, 4 and 5. FIG. 3 is a generic top down illustration of a transistor 100 surrounded by shallow trench isolation 105. Typically, there is more than one transistor 100 within the isolation 105 area, but one is shown for simplicity. The source-drain regions 120 contain the embedded alloy 122 and are separated by gate 140 having sidewall spacers 130. Cross-sections perpendicular to the gate 140 are indicated by the line A-A′. Cross-sections parallel to the gate and along the source-drain region 120 are indicated by the line B-B′. The problem stems from the fact that not only are facets 128 formed on the channel sidewall 121 of the embedded alloy 122 (as in FIG. 2 which is a cross section perpendicular to the gate 140 along A-A′), but facets 128 are also formed on the isolation sidewalls 123 of the embedded alloy 122 (as seen in FIG. 4 which is a cross section parallel to the gate 140 along B-B′). Because facets 128 exist on the isolation sidewalls 123, less volume is available for the embedded alloy 122 at the corners (“C”) of the devices and as well as in narrow devices. In FIG. 3, areas labeled “C” indicate areas which will have less volume of embedded alloy 122. When there is uneven embedded alloy 122 volume along the gate 140, then non-uniform stress is applied to the channel 155. Thus, referring to FIG. 3, channel stress (and hence speed) may be high in area indicated by an arrow from A to A′, whereas channel stress (and hence speed) may be low in an area indicated by an arrow from C to C. Accordingly, a process which creates a structure which provides a uniform channel stress along the gate length is required.
FIG. 5 shows an exacerbated problem of low volume when a “pyramid pit” forms in the embedded alloy 122. Here, a channel 155 width (not shown) is narrow, when the channel 155 width is less than a critical value relative to the total recess depth 124, then a pyramid pit forms. A pyramid pit means the facets 128 meet at the bottom of embedded alloy 122 such that an inverted pyramid forms rather than a flat bottomed area (compare FIGS. 5 and 4). Thus, with narrow channel devices, the total recess depth 124 is limited. Accordingly, a process which creates a narrowed channel device structure having a uniform channel stress along the gate length is required.
In summary, an embedded alloy structure and method are needed that allow freedom of vertex placement both laterally and vertically relative to a channel. Additionally, an embedded alloy structure and method are needed that provide a larger and more uniform volume of stressor material regardless of channel width. Furthermore, an embedded alloy structure and method are needed that provides uniform stress applied to a channel. Finally, an embedded alloy structure and method are needed that provides uniform stress for narrow channel devices.